1. Field of the Invention
The present invention relates generally to voltage generating circuits, and more specifically to a voltage generating circuit which can stably supply internal power supply voltage not exceeding rated voltage for the internal power supply voltage when external power supply voltage higher than the rated voltage is applied.
2. Description of the Background Art
In order to cope with the need for semiconductor devices having larger capacity and operating at higher speed, efforts have been made to reduce the size of elements. To cope with reduction in the breakdown voltage of the elements associated with such miniaturization, the operation power supply voltage has been lowered from the conventional 5V to 3.3V. Thus, some ICs including a semiconductor device are manufactured to have a rated value of 3.3V for the operation-guaranteed voltage, while the others still have the conventional, rated voltage value of 5V.
Under the circumstances, devices with various rated voltages are in the market such as PC card slots installed in PCs or the like and in these IC-installed circuits, the rated voltage can be 3.3V or 5V, or some devices are adapted to operate selectively with any of 3.3V or 5V.
Therefore, when an IC having an operation-guaranteed voltage of 3.3V is installed, a voltage generating circuit which can stably output 3.3V as an output power supply voltage is necessary in order to guarantee the operation of the IC as a board capable of operating with both 5V and 3.3V.
Japanese Patent Laying-Open No. 6-149395 discloses a voltage generating circuit for such an application incorporated in a semiconductor device. (Hereinafter, the disclosed voltage generating circuit will be referred to as xe2x80x9cconventional voltage generating circuitxe2x80x9d.)
FIG. 12 is a schematic block diagram showing the general configuration of a conventional voltage generating circuit 500.
Referring to FIG. 12, voltage generating circuit 500 receives an external power supply voltage VCE at an external power supply terminal 510 and supplies an internal power supply voltage Vcc to an internal circuit power supply interconnection 590. The operation power supply voltage is supplied through internal circuit power supply interconnection 590 to an internal circuit 550. Internal circuit 550 includes a decoder circuit 555, a sense amplifier circuit 556 and a control circuit 557.
Voltage generating circuit 500 includes a voltage down-converting circuit 520 to convert external power supply voltage VCE to internal power supply voltage Vcc, a power supply voltage detecting circuit 530 to detect the size of external power supply voltage VCE to send a control signal for controlling a switch circuit 540, and switch circuit 540 to transmit one of the output of voltage down-converting circuit 520 and external power supply voltage VCE to internal circuit power supply interconnection 590 in response to the control signal.
Voltage generating circuit 500 stably supplies a voltage of 3.3V, a rated value for the internal power supply voltage to internal circuit 550 if external power supply voltage VCE is either 5V or 3.3V.
FIG. 13 is a circuit diagram of the configuration of switch circuit 540.
Referring to FIG. 13, switch circuit 540 includes a P-type MOS transistor Q31 and an N-type MOS transistor Q32 forming a transfer gate which connects an external power supply interconnection 570 and internal circuit power supply interconnection 590 in response to an activation of a control signal MO1. Switch circuit 540 further includes a P-type MOS transistor Q33 and an N-type MOS transistor Q34 forming a transfer gate which connects voltage down-converting circuit 520 and internal circuit power supply interconnection 590 in response to an activation of a control signal M02.
Thus, when external power supply voltage VCE is 5V, control signal MO1 attains an H level (active state) and control signal M02 attains an L level (inactive state), so that the output of voltage down-converting circuit 520 is transmitted to internal circuit power supply interconnection 590. Meanwhile, when external power supply voltage VCE is 3.3V, control signal MO1 attains an L level, and control signal M02 attains an H level, so that external power supply voltage VCE is directly transmitted to internal circuit power supply interconnection 590.
FIG. 14 is a circuit diagram of the configuration of a power supply voltage detecting circuit 530.
Referring to FIG. 14, power supply voltage detecting circuit 530 includes P-type MOS transistors Q21, Q22 and an N-type MOS transistor Q23 connected in series between external power supply voltage interconnection 570 and a ground interconnection 580. The substrate region of transistor Q21 is connected to external power supply interconnection 570. The substrate region of transistor Q22, the gate of transistor Q21 and the source of transistor Q22 are connected to the drain of transistor Q21. The gate and drain of transistor Q22 are connected to a node Nx. Transistor Q23 is connected between node Nx and ground interconnection 580 and has a gate connected to ground interconnection 580.
Power supply voltage detecting circuit 530 further includes a P-type MOS transistor Q24 and an N-type MOS transistor Q25 forming an inverter which inverts the voltage level of node Nx for output to an internal node Ny, and a P-type MOS transistor Q26 and an N-type MOS transistor Q27 forming an inverter which inverts the voltage level of a node Ny for output to a node Nz.
Transistors Q24 and Q25 are connected in series between external power supply interconnection 570 and ground interconnection 580, and have their gates connected to node Nx. Transistors Q26 and Q27 are connected between external power supply interconnection 570 and ground interconnection 580 and have a gate connected to node Ny. The voltage level of control signal MO1 is equal to the voltage level of node Nz, while the voltage level of control signal MO2 is equal to the voltage level of node Ny. Control signals MO1 and MO2 are transmitted to switch circuit 540.
In power supply voltage detecting circuit 530, the voltage level of node Nx changes according to the level of external power supply voltage VCE.
If external power supply voltage VCExe2x89xa62xc2x7|VTP| (VTP: the threshold voltage of P-type transistors) holds, transistors Q21 and Q22 are in an off state, the voltage of node Nx is 0V (ground voltage). At this time, the voltage levels of nodes Ny and Nz are VCE and 0V, respectively by the function of the inverters formed by transistors Q24 to Q27. More specifically, control signal MO1 attains an L level, while control signal MO2 attains an H level.
If external power supply voltage VCExe2x89xa72xc2x7|VTP|+VI (VI: the logical threshold of inverters) holds, the voltage level of node Nx changes from 0V to VCE, the polarities of control signals MO1 and MO2 are inverted as the voltage levels of node Ny and Nz change, and control signal MO1 attains an H level, while control signal MO2 attains an L level.
Thus, if the threshold voltage VTP of a P-type transistor and the logical threshold VI of an inverter are designed appropriately, voltage generating circuit 500 can select whether to directly supply the external power supply voltage or supply the output of voltage down-converting circuit 520 to the internal circuit depending upon the result of the comparison between external power supply voltage VCE and a prescribed voltage level.
However, in this conventional voltage generating circuit 500, before external power supply interconnection 570 is activated, in other words before voltage is actually supplied to external power supply interconnection 570, VCE=0V holds, and therefore control signal MO1 attains an L level, so that external power supply interconnection 570 and internal circuit power supply interconnection 590 are connected by switch circuit 540.
Let us assume that, in this state, the external power supply is activated, and external power supply voltage VCE is raised from 0V to 5V. In this case, in response to the rising of external power supply voltage VCE, the output of switch circuit 540 to internal circuit power supply interconnection 590 should be switched from external power supply interconnection 570 to voltage down-converting circuit 530 in order to stably supply power supply voltage not exceeding 3.3V, i.e., the rated voltage for internal circuit 550.
In practice, however, the voltage levels of nodes Nx, Ny and Nz in power supply voltage detecting circuit 530 change, which causes the polarities of control signals MO1 and MO2 to be inverted, so that there is a prescribed time delay until internal circuit power supply interconnection 590 and external power supply interconnection 570 are disconnected by switch circuit 540.
The presence of the time delay causes external power supply voltage VCE to rise as internal circuit power supply interconnection 590 and external power supply interconnection 570 are connected immediately after the activation of the external power supply, and the peak of the internal power supply voltage could be as high as the maximum input voltage level (5V). This could cause the ICs whose internal power supply voltage is 3.3V installed in each circuit in internal circuit 550 to be destroyed with the applied voltage higher than the rated voltage.
Also when a circuit group having ICs of different operation rated voltages are allowed to operate under a common external power supply interconnection, a voltage generating circuit capable of stably supplying the operation voltage (3.3V) on the lower voltage side irrespectively of the voltage level supplied to the external power supply interconnection is necessary for the same reasons as above.
It is one object of the present invention to provide a voltage generating circuit capable of stably supplying an internal power supply voltage not exceeding a rated voltage if an external power supply voltage higher than the rated voltage for the internal power supply voltage is applied.
Briefly stated, a voltage generating circuit according to the present invention receives an external power supply voltage, generates an operation power supply voltage of a predetermined value and includes an external power supply interconnection, an internal power supply interconnection, a control node, an output switch circuit, an auxiliary voltage generating circuit, and a voltage switch control circuit.
The external power supply interconnection transmits an external power supply voltage. The internal power supply interconnection transmits the operation power supply voltage. The output switch circuit is activated based on the voltage level of the control node to connect the external power supply interconnection and the internal power supply interconnection. The auxiliary voltage generating circuit is connected between the external power supply interconnection and internal power supply interconnection and activated complementarily with the output switch circuit based on the voltage level of the control node to supply the voltage of the predetermined value to the internal power supply interconnection. The voltage switch control circuit controls the voltage of the control node to activate the auxiliary voltage generating circuit at the time of the activation of the external power supply interconnection and to activate the output switch circuit based on the voltage level of the external power supply interconnection after the activation and the voltage level of the external power supply interconnection is stabilized.
A voltage generating circuit according to another aspect of the present invention receives an external power supply voltage, generates a voltage of a predetermined value as an operation power supply voltage, and includes an external power supply interconnection, an internal power supply interconnection, a control node, an output switch circuit, an auxiliary voltage generating circuit, a voltage switch control circuit, and a voltage supply cut off circuit.
The external power supply interconnection transmits an external power supply voltage. The internal power supply interconnection transmits an operation power supply voltage. The output switch circuit is activated based on the voltage level of the control node to supply a voltage from the external power supply interconnection to the internal power supply interconnection. The auxiliary voltage generating circuit is connected between the external power supply interconnection and the internal power supply interconnection and activated complementarily with the output switch circuit based on the voltage level of the control node to supply the voltage of the predetermined value to the internal power supply interconnection. The voltage switch control circuit controls the voltage of the control node to activate the output switch circuit when the voltage level of the external power supply voltage is not more than a first reference voltage set higher than the rated voltage. The voltage supply cut off circuit stops the supply of voltage by the external power supply interconnection and the auxiliary voltage generating circuit until the voltage level of the external power supply interconnection is stabilized.
Therefore, a main advantage of the present invention lies in that until the voltage level of the external power supply interconnection is stabilized, voltage is supplied to the internal power supply interconnection by the auxiliary voltage generating circuit, so that stable voltage not exceeding the rated voltage can be supplied after the activation, and after the voltage level is stabilized, the auxiliary voltage generating circuit may be inactivated based on the voltage level of the external power supply interconnection to reduce the power consumption.
By the function of the voltage supply cut off circuit, voltage supply to the internal power supply interconnection is temporarily stopped during a prescribed period at the rising of the external power supply voltage, the internal power supply voltage may be controlled so as not to exceed the level of the rated voltage.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.